1. Field of the Invention
The present invention relates to control of a current-controlled DC-DC converter, and, more particularly to control of an output voltage at power-on and at power-off of a current-controlled DC-DC converter.
2. Description of Related Art
Japanese Unexamined Patent Publication No. H9-154275 discloses a DC-DC converter control circuit that aims to prevent dependence of output voltage rise/fall characteristics on a load at power-on/at power-off. This circuit is a voltage-controlled DC-DC converter control circuit.
As shown in FIG. 7, in a DC-DC control circuit 105, a constant current circuit I100 is a charging circuit that charges a soft-start capacitor C120 when a switching circuit S100 is off to raise potential of the soft-start capacitor C120 in a fixed time.
An error amplifier 110 amplifies a difference between a voltage divided by resistances R100 and R200 and a reference voltage value, or a lower voltage value of a reference voltage e100 and a voltage of the soft-start capacitor C120, and outputs the output to a PWM comparator 130.
As the constant current circuit I110 charges the soft-start capacitor C120, since control is carried out to gradually raise the reference voltage value that determines an output voltage of a DC-DC converter so as to output a regular voltage value after a fixed time, the output voltage of the DC-DC converter is controlled by a time constant determined by capacitance of the soft-start capacitor C120 without depending on a load.
An AND circuit AND 100 becomes high level as a result of a DSCHG signal that controls valid/invalid of a load capacitance discharge being high (valid) and an ON signal that controls ON/OFF at power-off becoming low.
A load capacitance discharge switching circuit S200 reaches an ON state when the AND circuit AND 100 is outputting a high level, short-circuits a section between the DC-DC converter output and ground, and forcedly discharges output load capacitance of the DC-DC converter without depending on a load of the DC-DC converter.
In addition, a current-controlled DC-DC converter is shown in FIG. 8.
A voltage amplifier AMP1 amplifies a voltage drop caused by a current that flows to a current measuring resistance RS1 and outputs a voltage VP proportional to the current that flows to the current measuring resistance RS1.
An error amplifier ERA1 amplifies a difference between a lower one of the voltages applied to two noninverting input terminals and a voltage applied to an inverting input terminal and outputs a voltage VC.
An oscillator OSC 100 generates a pulse at a fixed frequency to periodically set a flip-flop circuit FF. When the flip-flop circuit FF is set, a MOS transistor FET1 being a main switching transistor is turned on and a MOS transistor FET2 being a synchronous rectification switch is turned off.
When the output VP of the voltage amplifier AMP1 becomes greater than the output VC of the error amplifier ERA1, a voltage comparator COMP1 resets the flip-flop circuit FF to turn off the MOS transistor FET1.
A switching circuit SW21 is a circuit to connect a constant current circuit I2 to a soft-start capacitor CS2, and a switching circuit SW22 is a circuit to connect a discharge resistance RD2 to the soft-start capacitor CS2.
Similar to the case of the voltage-controlled DC-DC converter disclosed in Japanese Unexamined Patent Publication No. H9-154275, to the noninverting input terminals of the error amplifier ERA1, a reference voltage e1 and the soft-start capacitor CS2 are connected. In response to power-on, the soft-start capacitor CS2 is charged by the constant current circuit I2 so that voltage gradually rises. While the voltage of the soft-start capacitor CS2 is lower than the reference voltage e1, the error amplifier ERA1 differentiates a divided voltage value of an output voltage VOUT with respect to the voltage of the soft-start capacitor CS2 for amplification and outputs the voltage VC.